/*
 * Copyright (c) Huawei Technologies Co., Ltd. 2021. All rights reserved.
 * Description: AN_LTH60 REG Definition
 * Author: ETH group
 * Create: 2021-4-8
 */
#ifndef MAC_REG_AN_LTH60_H
#define MAC_REG_AN_LTH60_H

/* Base address of Module's Register */
#define AN_LTH60_BASE  (0x0)

#define AN_LTH60_COMMON_INT_INFO_R                                     (AN_LTH60_BASE + 0x0)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE0_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000001)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE1_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000002)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE2_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000004)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE3_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000008)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE4_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000010)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE5_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000020)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE6_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000040)
#define AN_LTH60_COMMON_INT_INFO_R_AN_LANE7_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000080)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE0_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000100)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE1_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000200)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE2_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000400)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE3_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00000800)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE4_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00001000)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE5_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00002000)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE6_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00004000)
#define AN_LTH60_COMMON_INT_INFO_R_LT_LANE7_INT_F                      (AN_LTH60_BASE + 0x0),    (0x00008000)
#define AN_LTH60_COMMON_LT_CAPTURE_CFG_R                               (AN_LTH60_BASE + 0x4)
#define AN_LTH60_COMMON_LT_CAPTURE_CFG_R_CAP_CMD_F                     (AN_LTH60_BASE + 0x4),    (0x000000ff)
#define AN_LTH60_COMMON_LT_CAPTURE_CFG_R_CAP_LOCAL_REMOTE_F            (AN_LTH60_BASE + 0x4),    (0x00000100)
#define AN_LTH60_COMMON_LT_CAPTURE_CFG_R_CAP_DATA_CMD_F                (AN_LTH60_BASE + 0x4),    (0x00000200)
#define AN_LTH60_COMMON_LT_CAPTURE_CFG_R_CAP_CONTROL_STATUS_F          (AN_LTH60_BASE + 0x4),    (0x00000400)
#define AN_LTH60_COMMON_LT_CAPTURE_CFG_R_CAP_NUM_F                     (AN_LTH60_BASE + 0x4),    (0x003f0000)
#define AN_LTH60_COMMON_LT_CAPTURE_CFG_R_CAP_OFFSET_F                  (AN_LTH60_BASE + 0x4),    (0xff000000)
#define AN_LTH60_COMMON_LT_CAPTURE_STATUS_R                            (AN_LTH60_BASE + 0x8)
#define AN_LTH60_COMMON_LT_CAPTURE_STATUS_R_CAP_ON_WORK_F              (AN_LTH60_BASE + 0x8),    (0x00000001)
#define AN_LTH60_COMMON_LT_CAPTURE_STATUS_R_CAP_TRIGGERED_F            (AN_LTH60_BASE + 0x8),    (0x00000002)
#define AN_LTH60_COMMON_LT_CAPTURE_STATUS_R_CAP_DONE_F                 (AN_LTH60_BASE + 0x8),    (0x00000004)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA0_R                             (AN_LTH60_BASE + 0xc)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA0_R_DATA0_F                     (AN_LTH60_BASE + 0xc),    (0xffffffff)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA1_R                             (AN_LTH60_BASE + 0x10)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA1_R_DATA1_F                     (AN_LTH60_BASE + 0x10),   (0xffffffff)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA2_R                             (AN_LTH60_BASE + 0x14)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA2_R_DATA2_F                     (AN_LTH60_BASE + 0x14),   (0xffffffff)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA3_R                             (AN_LTH60_BASE + 0x18)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA3_R_DATA3_F                     (AN_LTH60_BASE + 0x18),   (0xffffffff)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA4_R                             (AN_LTH60_BASE + 0x1c)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA4_R_DATA4_F                     (AN_LTH60_BASE + 0x1c),   (0xffffffff)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA5_R                             (AN_LTH60_BASE + 0x20)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA5_R_DATA5_F                     (AN_LTH60_BASE + 0x20),   (0xffffffff)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA6_R                             (AN_LTH60_BASE + 0x24)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA6_R_DATA6_F                     (AN_LTH60_BASE + 0x24),   (0xffffffff)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA7_R                             (AN_LTH60_BASE + 0x28)
#define AN_LTH60_COMMON_LT_CAPTURE_DATA7_R_DATA7_F                     (AN_LTH60_BASE + 0x28),   (0xffffffff)
#define AN_LTH60_COMMON_SPARE_R                                        (AN_LTH60_BASE + 0x30)
#define AN_LTH60_COMMON_SPARE_R_SPARE_F                                (AN_LTH60_BASE + 0x30),   (0xffffffff)
#define AN_LTH60_COMMON_SPARE_CNT_R                                    (AN_LTH60_BASE + 0x34)
#define AN_LTH60_COMMON_SPARE_CNT_R_CNT_F                              (AN_LTH60_BASE + 0x34),   (0x0000ffff)
#define AN_LTH60_LT_LANE0_INT_STATUS_R                                 (AN_LTH60_BASE + 0x100)
#define AN_LTH60_LT_LANE0_INT_STATUS_R_TRAIN_SUCCESS_F                 (AN_LTH60_BASE + 0x100),  (0x00000001)
#define AN_LTH60_LT_LANE0_INT_STATUS_R_TRAIN_FAIL_F                    (AN_LTH60_BASE + 0x100),  (0x00000002)
#define AN_LTH60_LT_LANE0_INT_STATUS_R_TRAIN_SOFT_CMD_TRIP_END_F       (AN_LTH60_BASE + 0x100),  (0x00000004)
#define AN_LTH60_LT_LANE0_INT_STATUS_R_TRAIN_SOFT_FETCH_EYE_F          (AN_LTH60_BASE + 0x100),  (0x00000008)
#define AN_LTH60_LT_LANE0_INT_STATUS_R_INIT_AUX_TIMER_OUT_F            (AN_LTH60_BASE + 0x100),  (0x00000010)
#define AN_LTH60_LT_LANE0_INT_ENABLE_R                                 (AN_LTH60_BASE + 0x104)
#define AN_LTH60_LT_LANE0_INT_ENABLE_R_TRAIN_SUCCESS_F                 (AN_LTH60_BASE + 0x104),  (0x00000001)
#define AN_LTH60_LT_LANE0_INT_ENABLE_R_TRAIN_FAIL_F                    (AN_LTH60_BASE + 0x104),  (0x00000002)
#define AN_LTH60_LT_LANE0_INT_ENABLE_R_TRAIN_SOFT_CMD_TRIP_END_F       (AN_LTH60_BASE + 0x104),  (0x00000004)
#define AN_LTH60_LT_LANE0_INT_ENABLE_R_TRAIN_SOFT_FETCH_EYE_F          (AN_LTH60_BASE + 0x104),  (0x00000008)
#define AN_LTH60_LT_LANE0_INT_ENABLE_R_INIT_AUX_TIMER_OUT_F            (AN_LTH60_BASE + 0x104),  (0x00000010)
#define AN_LTH60_LT_LANE0_INT_SET_R                                    (AN_LTH60_BASE + 0x108)
#define AN_LTH60_LT_LANE0_INT_SET_R_TRAIN_SUCCESS_F                    (AN_LTH60_BASE + 0x108),  (0x00000001)
#define AN_LTH60_LT_LANE0_INT_SET_R_TRAIN_FAIL_F                       (AN_LTH60_BASE + 0x108),  (0x00000002)
#define AN_LTH60_LT_LANE0_INT_SET_R_TRAIN_SOFT_CMD_TRIP_END_F          (AN_LTH60_BASE + 0x108),  (0x00000004)
#define AN_LTH60_LT_LANE0_INT_SET_R_TRAIN_SOFT_FETCH_EYE_F             (AN_LTH60_BASE + 0x108),  (0x00000008)
#define AN_LTH60_LT_LANE0_INT_SET_R_INIT_AUX_TIMER_OUT_F               (AN_LTH60_BASE + 0x108),  (0x00000010)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R                               (AN_LTH60_BASE + 0x10c)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_TRAINING_ENABLE_F         (AN_LTH60_BASE + 0x10c),  (0x00000001)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_TRAINING_MODE_F           (AN_LTH60_BASE + 0x10c),  (0x00000002)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_TRAIN_RESTART_F               (AN_LTH60_BASE + 0x10c),  (0x00000004)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_AP_LMT_MODE_F             (AN_LTH60_BASE + 0x10c),  (0x00000008)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_VPK_MODE_F                (AN_LTH60_BASE + 0x10c),  (0x00000010)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_AP_MAIN_MODE_F            (AN_LTH60_BASE + 0x10c),  (0x00000020)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_TRAIN_INV_MAIN_F          (AN_LTH60_BASE + 0x10c),  (0x00000040)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_TRAIN_INV_PRE_F           (AN_LTH60_BASE + 0x10c),  (0x00000080)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_TRAIN_INV_POST_F          (AN_LTH60_BASE + 0x10c),  (0x00000100)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_TRAIN_INV_PRE2_F          (AN_LTH60_BASE + 0x10c),  (0x00000200)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_PHASE1_TRIGGER_TIMER_F    (AN_LTH60_BASE + 0x10c),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_MAN_DEC_F                 (AN_LTH60_BASE + 0x10c),  (0x03000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_MARKER_DEC_F              (AN_LTH60_BASE + 0x10c),  (0x0c000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_RX_BIT_ORDER_F            (AN_LTH60_BASE + 0x10c),  (0x10000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG1_R_CFG_TX_BIT_ORDER_F            (AN_LTH60_BASE + 0x10c),  (0x20000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R                               (AN_LTH60_BASE + 0x110)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_CFG_INC_STEP_F                (AN_LTH60_BASE + 0x110),  (0x00000003)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_REMOTE_RX_READY_CHECK_EN_F    (AN_LTH60_BASE + 0x110),  (0x00000008)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_CFG_HCF_ENABLE_F              (AN_LTH60_BASE + 0x110),  (0x00000010)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_CFG_DATA_WIDTH_F              (AN_LTH60_BASE + 0x110),  (0x000000e0)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_CFG_LIMIT_2_F                 (AN_LTH60_BASE + 0x110),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_CFG_LIMIT_1_F                 (AN_LTH60_BASE + 0x110),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_CFG_PRST_CHOOSE_F             (AN_LTH60_BASE + 0x110),  (0x03000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_RESET_TRAIN_TX_F              (AN_LTH60_BASE + 0x110),  (0x04000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_RESET_TRAIN_RX_F              (AN_LTH60_BASE + 0x110),  (0x08000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_RESET_SPI_F                   (AN_LTH60_BASE + 0x110),  (0x10000000)
#define AN_LTH60_LT_LANE0_CONTROL_CFG2_R_FROZEN_INI_EN_F               (AN_LTH60_BASE + 0x110),  (0x40000000)
#define AN_LTH60_LT_LANE0_PAM4_CFG_R                                   (AN_LTH60_BASE + 0x114)
#define AN_LTH60_LT_LANE0_PAM4_CFG_R_CFG_RX_SYMBOL_BIT_ORDER_F         (AN_LTH60_BASE + 0x114),  (0x00000001)
#define AN_LTH60_LT_LANE0_PAM4_CFG_R_CFG_TX_SYMBOL_BIT_ORDER_F         (AN_LTH60_BASE + 0x114),  (0x00000002)
#define AN_LTH60_LT_LANE0_PAM4_CFG_R_CFG_PRE2_SUPPORT_F                (AN_LTH60_BASE + 0x114),  (0x10000000)
#define AN_LTH60_LT_LANE0_PAM4_CFG_R_CFG_TRAIN_PRE2_ENB_F              (AN_LTH60_BASE + 0x114),  (0x20000000)
#define AN_LTH60_LT_LANE0_PAM4_CFG_R_CFG_MODE_CHOOSE_F                 (AN_LTH60_BASE + 0x114),  (0xc0000000)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R                             (AN_LTH60_BASE + 0x118)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_CMD_START_F             (AN_LTH60_BASE + 0x118),  (0x00000001)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_POST_CMD_F              (AN_LTH60_BASE + 0x118),  (0x00000030)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_MAIN_CMD_F              (AN_LTH60_BASE + 0x118),  (0x000000c0)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_PRE_CMD_F               (AN_LTH60_BASE + 0x118),  (0x00000300)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_PRE2_CMD_F              (AN_LTH60_BASE + 0x118),  (0x00000c00)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_PRESET_CMD_F            (AN_LTH60_BASE + 0x118),  (0x00003000)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_START_BER_CMD_F         (AN_LTH60_BASE + 0x118),  (0x00004000)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_START_SNR_CMD_F         (AN_LTH60_BASE + 0x118),  (0x00008000)
#define AN_LTH60_LT_LANE0_SOFT_TRAIN_CFG_R_CFG_RECEIVE_READY_CMD_F     (AN_LTH60_BASE + 0x118),  (0x80000000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R                            (AN_LTH60_BASE + 0x11c)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R_TRAIN_EYE_MARGIN_MAX_F     (AN_LTH60_BASE + 0x11c),  (0x00007fff)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R_TRAIN_CUR_CMD_KEEP_F       (AN_LTH60_BASE + 0x11c),  (0x00010000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R_INITIAL_OR_PRESET_ONLY_F   (AN_LTH60_BASE + 0x11c),  (0x00020000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R_CFG_PRE2_ITERATION_F       (AN_LTH60_BASE + 0x11c),  (0x00700000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R_CFG_PAM4_MAXIMUM_WAIT_TIMER_F (AN_LTH60_BASE + 0x11c),  (0x00800000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R_CFG_SETTLE_WAIT_TIMER_F    (AN_LTH60_BASE + 0x11c),  (0x7f000000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG1_R_CFG_SINGAL_METRIC_F        (AN_LTH60_BASE + 0x11c),  (0x80000000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG2_R                            (AN_LTH60_BASE + 0x120)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG2_R_TRAIN_TERMINATE_TIMER_F    (AN_LTH60_BASE + 0x120),  (0x0000ffff)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG2_R_TRAIN_TERMINATE_EN_F       (AN_LTH60_BASE + 0x120),  (0x00010000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG2_R_CFG_INIT_TIMER_F           (AN_LTH60_BASE + 0x120),  (0x1ff00000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG3_R                            (AN_LTH60_BASE + 0x124)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG3_R_TRAIN_ITERATION_TIMER_F    (AN_LTH60_BASE + 0x124),  (0x000001ff)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG3_R_TRAIN_ITERATION_CTL_EN_F   (AN_LTH60_BASE + 0x124),  (0x00010000)
#define AN_LTH60_LT_LANE0_HARD_TRAIN_CFG3_R_CFG_INIT_AUX_TIMER_F       (AN_LTH60_BASE + 0x124),  (0x3ff00000)
#define AN_LTH60_LT_LANE0_MARKER_THRESHOLD_CFG_R                       (AN_LTH60_BASE + 0x128)
#define AN_LTH60_LT_LANE0_MARKER_THRESHOLD_CFG_R_BAD_MARKER_THD_F      (AN_LTH60_BASE + 0x128),  (0x0000000f)
#define AN_LTH60_LT_LANE0_MARKER_THRESHOLD_CFG_R_GOOD_MARKER_THD_F     (AN_LTH60_BASE + 0x128),  (0x00000070)
#define AN_LTH60_LT_LANE0_PRE2_CURSOR_CFG1_R                           (AN_LTH60_BASE + 0x12c)
#define AN_LTH60_LT_LANE0_PRE2_CURSOR_CFG1_R_CFG_TRAIN_PRESET3_PRE2_F  (AN_LTH60_BASE + 0x12c),  (0x000000ff)
#define AN_LTH60_LT_LANE0_PRE2_CURSOR_CFG1_R_CFG_TRAIN_PRESET2_PRE2_F  (AN_LTH60_BASE + 0x12c),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_PRE2_CURSOR_CFG1_R_CFG_TRAIN_PRESET1_PRE2_F  (AN_LTH60_BASE + 0x12c),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_PRE2_CURSOR_CFG2_R                           (AN_LTH60_BASE + 0x130)
#define AN_LTH60_LT_LANE0_PRE2_CURSOR_CFG2_R_CFG_TRAIN_MIN_PRE2_F      (AN_LTH60_BASE + 0x130),  (0x000000ff)
#define AN_LTH60_LT_LANE0_PRE2_CURSOR_CFG2_R_CFG_TRAIN_MAX_PRE2_F      (AN_LTH60_BASE + 0x130),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG1_R                            (AN_LTH60_BASE + 0x134)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG1_R_CFG_TRAIN_PRESET3_PRE_F    (AN_LTH60_BASE + 0x134),  (0x000000ff)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG1_R_CFG_TRAIN_PRESET2_PRE_F    (AN_LTH60_BASE + 0x134),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG1_R_CFG_TRAIN_PRESET1_PRE_F    (AN_LTH60_BASE + 0x134),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG1_R_CFG_TRAIN_INIT_PRE_F       (AN_LTH60_BASE + 0x134),  (0xff000000)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG2_R                            (AN_LTH60_BASE + 0x138)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG2_R_CFG_TRAIN_MIN_PRE_F        (AN_LTH60_BASE + 0x138),  (0x000000ff)
#define AN_LTH60_LT_LANE0_PRE_CURSOR_CFG2_R_CFG_TRAIN_MAX_PRE_F        (AN_LTH60_BASE + 0x138),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG1_R                           (AN_LTH60_BASE + 0x13c)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG1_R_CFG_TRAIN_PRESET3_POST_F  (AN_LTH60_BASE + 0x13c),  (0x000000ff)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG1_R_CFG_TRAIN_PRESET2_POST_F  (AN_LTH60_BASE + 0x13c),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG1_R_CFG_TRAIN_PRESET1_POST_F  (AN_LTH60_BASE + 0x13c),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG1_R_CFG_TRAIN_INIT_POST_F     (AN_LTH60_BASE + 0x13c),  (0xff000000)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG2_R                           (AN_LTH60_BASE + 0x140)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG2_R_CFG_TRAIN_MIN_POST_F      (AN_LTH60_BASE + 0x140),  (0x000000ff)
#define AN_LTH60_LT_LANE0_POST_CURSOR_CFG2_R_CFG_TRAIN_MAX_POST_F      (AN_LTH60_BASE + 0x140),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG1_R                           (AN_LTH60_BASE + 0x144)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG1_R_CFG_TRAIN_PRESET3_MAIN_F  (AN_LTH60_BASE + 0x144),  (0x000000ff)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG1_R_CFG_TRAIN_PRESET2_MAIN_F  (AN_LTH60_BASE + 0x144),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG1_R_CFG_TRAIN_PRESET1_MAIN_F  (AN_LTH60_BASE + 0x144),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG1_R_CFG_TRAIN_INIT_MAIN_F     (AN_LTH60_BASE + 0x144),  (0xff000000)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG2_R                           (AN_LTH60_BASE + 0x148)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG2_R_CFG_TRAIN_MIN_MAIN_F      (AN_LTH60_BASE + 0x148),  (0x000000ff)
#define AN_LTH60_LT_LANE0_MAIN_CURSOR_CFG2_R_CFG_TRAIN_MAX_MAIN_F      (AN_LTH60_BASE + 0x148),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_PRBS_CFG_R                                   (AN_LTH60_BASE + 0x14c)
#define AN_LTH60_LT_LANE0_PRBS_CFG_R_CFG_PRBS_SEED_CUSTOM_F            (AN_LTH60_BASE + 0x14c),  (0x000007ff)
#define AN_LTH60_LT_LANE0_PRBS_CFG_R_CFG_PRBS_SEED_FIXED_F             (AN_LTH60_BASE + 0x14c),  (0x00001800)
#define AN_LTH60_LT_LANE0_PRBS_CFG_R_CFG_PRBS_SEED_MODE_F              (AN_LTH60_BASE + 0x14c),  (0x0000e000)
#define AN_LTH60_LT_LANE0_PRBS_CFG_R_CFG_PRBS_AUTO_DETECT_MODE_F       (AN_LTH60_BASE + 0x14c),  (0x00010000)
#define AN_LTH60_LT_LANE0_SPI_CFG_R                                    (AN_LTH60_BASE + 0x150)
#define AN_LTH60_LT_LANE0_SPI_CFG_R_CFG_EYE_SCAN_TIMER_F               (AN_LTH60_BASE + 0x150),  (0x000003ff)
#define AN_LTH60_LT_LANE0_SPI_CFG_R_CFG_EYE_SCAN_TIMER_ENB_F           (AN_LTH60_BASE + 0x150),  (0x00000400)
#define AN_LTH60_LT_LANE0_SPI_CFG_R_CFG_READ_DELAY_F                   (AN_LTH60_BASE + 0x150),  (0x7c000000)
#define AN_LTH60_LT_LANE0_SNR_BER_CFG_R                                (AN_LTH60_BASE + 0x154)
#define AN_LTH60_LT_LANE0_SNR_BER_CFG_R_CFG_SNR_NUM_F                  (AN_LTH60_BASE + 0x154),  (0x000001ff)
#define AN_LTH60_LT_LANE0_SNR_BER_CFG_R_CFG_BER_NUM_SEARCH_UPDATE_F    (AN_LTH60_BASE + 0x154),  (0x001ffc00)
#define AN_LTH60_LT_LANE0_SNR_BER_CFG_R_CFG_BER_NUM_SDS_UPDATE_F       (AN_LTH60_BASE + 0x154),  (0xffe00000)
#define AN_LTH60_LT_LANE0_TIMER_CNT_CFG_R                              (AN_LTH60_BASE + 0x158)
#define AN_LTH60_LT_LANE0_TIMER_CNT_CFG_R_TRAIN_TIMER_1MS_UNIT_F       (AN_LTH60_BASE + 0x158),  (0x001fffff)
#define AN_LTH60_LT_LANE0_TIMER_CNT_CFG_R_TRAIN_TIMER_1US_UNIT_F       (AN_LTH60_BASE + 0x158),  (0xffe00000)
#define AN_LTH60_LT_LANE0_TIMER_CFG1_R                                 (AN_LTH60_BASE + 0x15c)
#define AN_LTH60_LT_LANE0_TIMER_CFG1_R_CFG_TRAIN_MAX_TIMER_F           (AN_LTH60_BASE + 0x15c),  (0x0000ffff)
#define AN_LTH60_LT_LANE0_TIMER_CFG1_R_CFG_TRAIN_MAX_TIMER_ENB_F       (AN_LTH60_BASE + 0x15c),  (0x00010000)
#define AN_LTH60_LT_LANE0_TIMER_CFG1_R_CFG_LINK_WAIT_TIMER_F           (AN_LTH60_BASE + 0x15c),  (0x03fe0000)
#define AN_LTH60_LT_LANE0_TIMER_CFG2_R                                 (AN_LTH60_BASE + 0x160)
#define AN_LTH60_LT_LANE0_TIMER_CFG2_R_CFG_MAX_WAIT_TIMER_F            (AN_LTH60_BASE + 0x160),  (0x0000ffff)
#define AN_LTH60_LT_LANE0_TIMER_CFG2_R_CFG_TRAIN_HOLDOFF_TIMER_F       (AN_LTH60_BASE + 0x160),  (0x007f0000)
#define AN_LTH60_LT_LANE0_DME_STATUS_R                                 (AN_LTH60_BASE + 0x164)
#define AN_LTH60_LT_LANE0_DME_STATUS_R_TRAINING_COMPLETE_F             (AN_LTH60_BASE + 0x164),  (0x00000001)
#define AN_LTH60_LT_LANE0_DME_STATUS_R_FRAME_LOCK_F                    (AN_LTH60_BASE + 0x164),  (0x00000002)
#define AN_LTH60_LT_LANE0_DME_STATUS_R_TRAINING_FAILURE_F              (AN_LTH60_BASE + 0x164),  (0x00000004)
#define AN_LTH60_LT_LANE0_DME_STATUS_R_LOCAL_TRAINING_COMPLETE_F       (AN_LTH60_BASE + 0x164),  (0x00000008)
#define AN_LTH60_LT_LANE0_DME_STATUS_R_REMOTE_TRAINING_COMPLETE_F      (AN_LTH60_BASE + 0x164),  (0x00000010)
#define AN_LTH60_LT_LANE0_DME_STATUS_R_REMOTE_TF_LOCK_F                (AN_LTH60_BASE + 0x164),  (0x00000020)
#define AN_LTH60_LT_LANE0_DME_STATUS_R_PRBS_MODE_F                     (AN_LTH60_BASE + 0x164),  (0x000000c0)
#define AN_LTH60_LT_LANE0_CUR_EYE_MARGIN_STATUS_R                      (AN_LTH60_BASE + 0x168)
#define AN_LTH60_LT_LANE0_CUR_EYE_MARGIN_STATUS_R_MARGIN_VALUE_F       (AN_LTH60_BASE + 0x168),  (0x7fffffff)
#define AN_LTH60_LT_LANE0_CUR_EYE_MARGIN_STATUS_R_EYE_SCAN_COMPLETE_F  (AN_LTH60_BASE + 0x168),  (0x80000000)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R                                 (AN_LTH60_BASE + 0x16c)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R_RMT_STAT_POST_F                 (AN_LTH60_BASE + 0x16c),  (0x00000003)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R_RMT_STAT_MAIN_F                 (AN_LTH60_BASE + 0x16c),  (0x0000000c)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R_RMT_STAT_PRE_F                  (AN_LTH60_BASE + 0x16c),  (0x00000030)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R_RMT_MODULATION_DONE_F           (AN_LTH60_BASE + 0x16c),  (0x00000200)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R_RMT_COEF_ECHO_F                 (AN_LTH60_BASE + 0x16c),  (0x00038000)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R_RMT_COEF_STATUS_F               (AN_LTH60_BASE + 0x16c),  (0x00700000)
#define AN_LTH60_LT_LANE0_RMT_STATUS_R_RMT_PRE2_NOT_SUPPORT_F          (AN_LTH60_BASE + 0x16c),  (0x80000000)
#define AN_LTH60_LT_LANE0_CUR_TAP_WEIGHT_STATUS_R                      (AN_LTH60_BASE + 0x170)
#define AN_LTH60_LT_LANE0_CUR_TAP_WEIGHT_STATUS_R_CUR_POST_F           (AN_LTH60_BASE + 0x170),  (0x000000ff)
#define AN_LTH60_LT_LANE0_CUR_TAP_WEIGHT_STATUS_R_CUR_MAIN_F           (AN_LTH60_BASE + 0x170),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_CUR_TAP_WEIGHT_STATUS_R_CUR_PRE_F            (AN_LTH60_BASE + 0x170),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_CUR_TAP_WEIGHT_STATUS_R_CUR_PRE2_F           (AN_LTH60_BASE + 0x170),  (0xff000000)
#define AN_LTH60_LT_LANE0_STATUS_R                                     (AN_LTH60_BASE + 0x174)
#define AN_LTH60_LT_LANE0_STATUS_R_RMT_STAT_POST_SOFT_F                (AN_LTH60_BASE + 0x174),  (0x00000003)
#define AN_LTH60_LT_LANE0_STATUS_R_RMT_STAT_MAIN_SOFT_F                (AN_LTH60_BASE + 0x174),  (0x0000000c)
#define AN_LTH60_LT_LANE0_STATUS_R_RMT_STAT_PRE_SOFT_F                 (AN_LTH60_BASE + 0x174),  (0x00000030)
#define AN_LTH60_LT_LANE0_STATUS_R_RMT_COEF_SOFT_F                     (AN_LTH60_BASE + 0x174),  (0x00000700)
#define AN_LTH60_LT_LANE0_DBG_INFO0_R                                  (AN_LTH60_BASE + 0x178)
#define AN_LTH60_LT_LANE0_DBG_INFO0_R_TRAIN_STATE_F                    (AN_LTH60_BASE + 0x178),  (0x00007fff)
#define AN_LTH60_LT_LANE0_DBG_INFO0_R_SDS_ARB_STATE_F                  (AN_LTH60_BASE + 0x178),  (0x000e0000)
#define AN_LTH60_LT_LANE0_DBG_INFO0_R_PRE2_UPD_STATE_F                 (AN_LTH60_BASE + 0x178),  (0x00700000)
#define AN_LTH60_LT_LANE0_DBG_INFO0_R_PRE_UPD_STATE_F                  (AN_LTH60_BASE + 0x178),  (0x03800000)
#define AN_LTH60_LT_LANE0_DBG_INFO0_R_MAIN_UPD_STATE_F                 (AN_LTH60_BASE + 0x178),  (0x1c000000)
#define AN_LTH60_LT_LANE0_DBG_INFO0_R_POST_UPD_STATE_F                 (AN_LTH60_BASE + 0x178),  (0xe0000000)
#define AN_LTH60_LT_LANE0_DBG_INFO1_R                                  (AN_LTH60_BASE + 0x17c)
#define AN_LTH60_LT_LANE0_DBG_INFO1_R_SEARCH_STATE_F                   (AN_LTH60_BASE + 0x17c),  (0x00007fff)
#define AN_LTH60_LT_LANE0_DBG_INFO1_R_MEASURE_POS_F                    (AN_LTH60_BASE + 0x17c),  (0x007f8000)
#define AN_LTH60_LT_LANE0_DBG_INFO1_R_MEASURE_POS2_F                   (AN_LTH60_BASE + 0x17c),  (0x0f000000)
#define AN_LTH60_LT_LANE0_DBG_INFO1_R_SEARCH_STEP2_ACTIVE_F            (AN_LTH60_BASE + 0x17c),  (0x10000000)
#define AN_LTH60_LT_LANE0_DBG_INFO2_R                                  (AN_LTH60_BASE + 0x180)
#define AN_LTH60_LT_LANE0_DBG_INFO2_R_MAX_WAIT_TIMER_ENTER_TRAINL_F    (AN_LTH60_BASE + 0x180),  (0x0000ffff)
#define AN_LTH60_LT_LANE0_DBG_INFO2_R_MAX_WAIT_TIMER_EXIT_TRAINL_F     (AN_LTH60_BASE + 0x180),  (0xffff0000)
#define AN_LTH60_LT_LANE0_DBG_INFO3_R                                  (AN_LTH60_BASE + 0x184)
#define AN_LTH60_LT_LANE0_DBG_INFO3_R_MAX_WAIT_TIMER_ENTER_TRAINR_F    (AN_LTH60_BASE + 0x184),  (0x0000ffff)
#define AN_LTH60_LT_LANE0_DBG_INFO3_R_MAX_WAIT_TIMER_EXIT_TRAINR_F     (AN_LTH60_BASE + 0x184),  (0xffff0000)
#define AN_LTH60_LT_LANE0_DBG_INFO4_R                                  (AN_LTH60_BASE + 0x188)
#define AN_LTH60_LT_LANE0_DBG_INFO4_R_SPI_COEFF_UPD_STATE_F            (AN_LTH60_BASE + 0x188),  (0x00000003)
#define AN_LTH60_LT_LANE0_DBG_INFO4_R_SPI_EYE_SCAN_STATE_F             (AN_LTH60_BASE + 0x188),  (0x0000000c)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R                                  (AN_LTH60_BASE + 0x18c)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_SUM_COMPARE_CNT_F                (AN_LTH60_BASE + 0x18c),  (0x000001ff)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_LOCK_RESTART_CNT_F               (AN_LTH60_BASE + 0x18c),  (0x000f0000)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_MARGIN_MAX_CNT_F                 (AN_LTH60_BASE + 0x18c),  (0x00f00000)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_MARGIN_ZERO_CNT_F                (AN_LTH60_BASE + 0x18c),  (0x0f000000)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_RETRY_MARGIN_MAX_F               (AN_LTH60_BASE + 0x18c),  (0x10000000)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_RETRY_MARGIN_ZERO_F              (AN_LTH60_BASE + 0x18c),  (0x20000000)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_RESPONSE_2MS_VIOLATION_F         (AN_LTH60_BASE + 0x18c),  (0x40000000)
#define AN_LTH60_LT_LANE0_DBG_INFO5_R_RESPONSE_50MS_VIOLATION_F        (AN_LTH60_BASE + 0x18c),  (0x80000000)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R                                  (AN_LTH60_BASE + 0x190)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_MAIN_MIN_CNT_F                   (AN_LTH60_BASE + 0x190),  (0x00000003)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_MAIN_MAX_CNT_F                   (AN_LTH60_BASE + 0x190),  (0x0000000c)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_POST_MIN_CNT_F                   (AN_LTH60_BASE + 0x190),  (0x00000030)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_POST_MAX_CNT_F                   (AN_LTH60_BASE + 0x190),  (0x000000c0)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_PRE_MIN_CNT_F                    (AN_LTH60_BASE + 0x190),  (0x00000300)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_PRE_MAX_CNT_F                    (AN_LTH60_BASE + 0x190),  (0x00000c00)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_PRE2_MIN_CNT_F                   (AN_LTH60_BASE + 0x190),  (0x00003000)
#define AN_LTH60_LT_LANE0_DBG_INFO6_R_PRE2_MAX_CNT_F                   (AN_LTH60_BASE + 0x190),  (0x0000c000)
#define AN_LTH60_LT_LANE0_SNR_INFO1_R                                  (AN_LTH60_BASE + 0x194)
#define AN_LTH60_LT_LANE0_SNR_INFO1_R_SNR_BEST_F                       (AN_LTH60_BASE + 0x194),  (0x7fffffff)
#define AN_LTH60_LT_LANE0_SNR_INFO2_R                                  (AN_LTH60_BASE + 0x198)
#define AN_LTH60_LT_LANE0_SNR_INFO2_R_SNR_WORST_F                      (AN_LTH60_BASE + 0x198),  (0x7fffffff)
#define AN_LTH60_LT_LANE0_DME_INFO_R                                   (AN_LTH60_BASE + 0x19c)
#define AN_LTH60_LT_LANE0_DME_INFO_R_EYE_SCAN_TIMEOUT_F                (AN_LTH60_BASE + 0x19c),  (0x00000001)
#define AN_LTH60_LT_LANE0_DME_INFO_R_REPEAT_POS_DONE_F                 (AN_LTH60_BASE + 0x19c),  (0x00000004)
#define AN_LTH60_LT_LANE0_DME_INFO_R_TRAIN_COMP_CNT_DONE_F             (AN_LTH60_BASE + 0x19c),  (0x00000010)
#define AN_LTH60_LT_LANE0_DME_INFO_R_TRAIN_TIME_DONE_F                 (AN_LTH60_BASE + 0x19c),  (0x00000020)
#define AN_LTH60_LT_LANE0_DME_INFO_R_MAX_BOUNDARY_DONE_F               (AN_LTH60_BASE + 0x19c),  (0x00000040)
#define AN_LTH60_LT_LANE0_DME_INFO_R_PRESET_INI_CMD_ERR_F              (AN_LTH60_BASE + 0x19c),  (0x00000080)
#define AN_LTH60_LT_LANE0_DME_INFO_R_PRESET_INI_ERR_F                  (AN_LTH60_BASE + 0x19c),  (0x00000100)
#define AN_LTH60_LT_LANE0_FRAME_LOCK_FSM_INFO_R                        (AN_LTH60_BASE + 0x1a0)
#define AN_LTH60_LT_LANE0_FRAME_LOCK_FSM_INFO_R_STATE_F                (AN_LTH60_BASE + 0x1a0),  (0x3fffffff)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO1_R                               (AN_LTH60_BASE + 0x1a4)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO1_R_PRE_HIS_F                     (AN_LTH60_BASE + 0x1a4),  (0x000000ff)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO1_R_MAIN_HIS_F                    (AN_LTH60_BASE + 0x1a4),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO1_R_POST_HIS_F                    (AN_LTH60_BASE + 0x1a4),  (0x00ff0000)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO1_R_PRESET_HIS_F                  (AN_LTH60_BASE + 0x1a4),  (0x03000000)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO1_R_INIT_HIS_F                    (AN_LTH60_BASE + 0x1a4),  (0x0c000000)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO2_R                               (AN_LTH60_BASE + 0x1a8)
#define AN_LTH60_LT_LANE0_TX_CMD_INFO2_R_CMD_INTE_HIS_F                (AN_LTH60_BASE + 0x1a8),  (0x000001ff)
#define AN_LTH60_LT_LANE0_TFL_PHASE_INFO_R                             (AN_LTH60_BASE + 0x1ac)
#define AN_LTH60_LT_LANE0_TFL_PHASE_INFO_R_TRAINING_FRAME_LOCKED_F     (AN_LTH60_BASE + 0x1ac),  (0x00000001)
#define AN_LTH60_LT_LANE0_TFL_PHASE_INFO_R_PHASE3_REACHED_F            (AN_LTH60_BASE + 0x1ac),  (0x00000002)
#define AN_LTH60_LT_LANE0_TFL_PHASE_INFO_R_PHASE4_REACHED_F            (AN_LTH60_BASE + 0x1ac),  (0x00000004)
#define AN_LTH60_LT_LANE0_DME_CNT_R                                    (AN_LTH60_BASE + 0x1b0)
#define AN_LTH60_LT_LANE0_DME_CNT_R_DME_ERROR_CNT_F                    (AN_LTH60_BASE + 0x1b0),  (0x0000000f)
#define AN_LTH60_LT_LANE0_DME_CNT_R_FRAME_LOCK_LOSS_CNT_F              (AN_LTH60_BASE + 0x1b0),  (0x0000ff00)
#define AN_LTH60_LT_LANE0_DME_CNT_R_RMT_RDY_FALL_CNT_F                 (AN_LTH60_BASE + 0x1b0),  (0x00030000)
#define AN_LTH60_LT_LANE0_DME_CNT_R_RMT_LOCK_FALL_CNT_F                (AN_LTH60_BASE + 0x1b0),  (0x000c0000)
#define AN_LTH60_LT_LANE0_DME_CNT_R_RMT_PARITY_ERR_F                   (AN_LTH60_BASE + 0x1b0),  (0x00100000)
#define AN_LTH60_LT_LANE0_SM_DURATION0_CNT_R                           (AN_LTH60_BASE + 0x1b4)
#define AN_LTH60_LT_LANE0_SM_DURATION0_CNT_R_TRAIN_LOCAL_DURATION_F    (AN_LTH60_BASE + 0x1b4),  (0x0000ffff)
#define AN_LTH60_LT_LANE0_SM_DURATION0_CNT_R_TRAIN_REMOTE_DURATION_F   (AN_LTH60_BASE + 0x1b4),  (0xffff0000)
#define AN_LTH60_LT_LANE0_SM_DURATION1_CNT_R                           (AN_LTH60_BASE + 0x1b8)
#define AN_LTH60_LT_LANE0_SM_DURATION1_CNT_R_SEND_TRAINING_DURATION_F  (AN_LTH60_BASE + 0x1b8),  (0x0000ffff)
#define AN_LTH60_LT_LANE0_SM_DURATION1_CNT_R_TRAIN_WHOLE_DURATION_F    (AN_LTH60_BASE + 0x1b8),  (0xffff0000)
#define AN_LTH60_LT_LANE0_SPARE_R                                      (AN_LTH60_BASE + 0x1c0)
#define AN_LTH60_LT_LANE0_SPARE_R_SPARE_F                              (AN_LTH60_BASE + 0x1c0),  (0xffffffff)
#define AN_LTH60_LT_LANE0_SPARE_CNT_R                                  (AN_LTH60_BASE + 0x1c4)
#define AN_LTH60_LT_LANE0_SPARE_CNT_R_CNT_F                            (AN_LTH60_BASE + 0x1c4),  (0x0000ffff)
#define AN_LTH60_AN_LANE0_INT_STATUS_R                                 (AN_LTH60_BASE + 0x900)
#define AN_LTH60_AN_LANE0_INT_STATUS_R_AN_SUCCESS_F                    (AN_LTH60_BASE + 0x900),  (0x00000001)
#define AN_LTH60_AN_LANE0_INT_STATUS_R_AN_FAIL_F                       (AN_LTH60_BASE + 0x900),  (0x00000002)
#define AN_LTH60_AN_LANE0_INT_STATUS_R_AN_UPDATE_F                     (AN_LTH60_BASE + 0x900),  (0x00000004)
#define AN_LTH60_AN_LANE0_INT_STATUS_R_AN_NO_HCD_F                     (AN_LTH60_BASE + 0x900),  (0x00000008)
#define AN_LTH60_AN_LANE0_INT_ENABLE_R                                 (AN_LTH60_BASE + 0x904)
#define AN_LTH60_AN_LANE0_INT_ENABLE_R_AN_SUCCESS_F                    (AN_LTH60_BASE + 0x904),  (0x00000001)
#define AN_LTH60_AN_LANE0_INT_ENABLE_R_AN_FAIL_F                       (AN_LTH60_BASE + 0x904),  (0x00000002)
#define AN_LTH60_AN_LANE0_INT_ENABLE_R_AN_UPDATE_F                     (AN_LTH60_BASE + 0x904),  (0x00000004)
#define AN_LTH60_AN_LANE0_INT_ENABLE_R_AN_NO_HCD_F                     (AN_LTH60_BASE + 0x904),  (0x00000008)
#define AN_LTH60_AN_LANE0_INT_SET_R                                    (AN_LTH60_BASE + 0x908)
#define AN_LTH60_AN_LANE0_INT_SET_R_AN_SUCCESS_F                       (AN_LTH60_BASE + 0x908),  (0x00000001)
#define AN_LTH60_AN_LANE0_INT_SET_R_AN_FAIL_F                          (AN_LTH60_BASE + 0x908),  (0x00000002)
#define AN_LTH60_AN_LANE0_INT_SET_R_AN_UPDATE_F                        (AN_LTH60_BASE + 0x908),  (0x00000004)
#define AN_LTH60_AN_LANE0_INT_SET_R_AN_NO_HCD_F                        (AN_LTH60_BASE + 0x908),  (0x00000008)
#define AN_LTH60_AN_LANE0_MODE_CFG_R                                   (AN_LTH60_BASE + 0x90c)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_TX_BIT_ORDER_REVERSE_F            (AN_LTH60_BASE + 0x90c),  (0x00000001)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_RX_BIT_ORDER_REVERSE_F            (AN_LTH60_BASE + 0x90c),  (0x00000002)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_TX_IDLE_PATTERN_F                 (AN_LTH60_BASE + 0x90c),  (0x00000004)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_LINK_STATUS_SEL_F                 (AN_LTH60_BASE + 0x90c),  (0x00000008)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_BIT_DIVISOR_F                     (AN_LTH60_BASE + 0x90c),  (0x00001ff0)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_INCOMPATIBLE_LINK_F               (AN_LTH60_BASE + 0x90c),  (0x00002000)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_NP_NUMBER_F                       (AN_LTH60_BASE + 0x90c),  (0x0000c000)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_TOGGLE_SEL_F                      (AN_LTH60_BASE + 0x90c),  (0x00010000)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_PARALLEL_DETECT_DISABLE_F         (AN_LTH60_BASE + 0x90c),  (0x00020000)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_PARALLEL_DATA_WIDTH_F             (AN_LTH60_BASE + 0x90c),  (0x00780000)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_AN_LOSE_THD_F                     (AN_LTH60_BASE + 0x90c),  (0x7f800000)
#define AN_LTH60_AN_LANE0_MODE_CFG_R_AN_LOSE_THD_ENABLE_F              (AN_LTH60_BASE + 0x90c),  (0x80000000)
#define AN_LTH60_AN_LANE0_CTRL_CFG_R                                   (AN_LTH60_BASE + 0x910)
#define AN_LTH60_AN_LANE0_CTRL_CFG_R_AUTONEG_ENABLE_F                  (AN_LTH60_BASE + 0x910),  (0x00000001)
#define AN_LTH60_AN_LANE0_CTRL_CFG_R_AUTONEG_RESET_F                   (AN_LTH60_BASE + 0x910),  (0x00000002)
#define AN_LTH60_AN_LANE0_CTRL_CFG_R_AUTONEG_RESTART_F                 (AN_LTH60_BASE + 0x910),  (0x00000004)
#define AN_LTH60_AN_LANE0_CTRL_CFG_R_NEXT_PAGE_LOADED_F                (AN_LTH60_BASE + 0x910),  (0x00000008)
#define AN_LTH60_AN_LANE0_CTRL_CFG_R_FORCE_NONCE_MISMATCH_F            (AN_LTH60_BASE + 0x910),  (0x00000020)
#define AN_LTH60_AN_LANE0_CTRL_CFG_R_TRANSMITTED_NONCE_SEL_F           (AN_LTH60_BASE + 0x910),  (0x00000040)
#define AN_LTH60_AN_LANE0_TIMER_0_CFG_R                                (AN_LTH60_BASE + 0x914)
#define AN_LTH60_AN_LANE0_TIMER_0_CFG_R_AUTONEG_WAIT_TIMER_F           (AN_LTH60_BASE + 0x914),  (0x0000ffff)
#define AN_LTH60_AN_LANE0_TIMER_0_CFG_R_BREAK_LINK_TIMER_F             (AN_LTH60_BASE + 0x914),  (0xffff0000)
#define AN_LTH60_AN_LANE0_TIMER_1_CFG_R                                (AN_LTH60_BASE + 0x918)
#define AN_LTH60_AN_LANE0_TIMER_1_CFG_R_LINK_FAIL_INHIBIT_TIMER0_F     (AN_LTH60_BASE + 0x918),  (0x00007fff)
#define AN_LTH60_AN_LANE0_TIMER_1_CFG_R_LINK_FAIL_INHIBIT_TIMER0_NO_EXPIRE_F (AN_LTH60_BASE + 0x918),  (0x00008000)
#define AN_LTH60_AN_LANE0_TIMER_1_CFG_R_LINK_FAIL_INHIBIT_TIMER1_F     (AN_LTH60_BASE + 0x918),  (0x7fff0000)
#define AN_LTH60_AN_LANE0_TIMER_1_CFG_R_LINK_FAIL_INHIBIT_TIMER1_NO_EXPIRE_F (AN_LTH60_BASE + 0x918),  (0x80000000)
#define AN_LTH60_AN_LANE0_TIMER_2_CFG_R                                (AN_LTH60_BASE + 0x91c)
#define AN_LTH60_AN_LANE0_TIMER_2_CFG_R_LINK_FAIL_INHIBIT_TIMER2_F     (AN_LTH60_BASE + 0x91c),  (0x00007fff)
#define AN_LTH60_AN_LANE0_TIMER_2_CFG_R_LINK_FAIL_INHIBIT_TIMER2_NO_EXPIRE_F (AN_LTH60_BASE + 0x91c),  (0x00008000)
#define AN_LTH60_AN_LANE0_TIMER_2_CFG_R_LINK_FAIL_INHIBIT_TIMER3_F     (AN_LTH60_BASE + 0x91c),  (0x7fff0000)
#define AN_LTH60_AN_LANE0_TIMER_2_CFG_R_LINK_FAIL_INHIBIT_TIMER3_NO_EXPIRE_F (AN_LTH60_BASE + 0x91c),  (0x80000000)
#define AN_LTH60_AN_LANE0_TIMER_3_CFG_R                                (AN_LTH60_BASE + 0x920)
#define AN_LTH60_AN_LANE0_TIMER_3_CFG_R_MAX_PAGE_TIMER_THD_F           (AN_LTH60_BASE + 0x920),  (0x000001ff)
#define AN_LTH60_AN_LANE0_TIMER_UNIT_CFG_R                             (AN_LTH60_BASE + 0x924)
#define AN_LTH60_AN_LANE0_TIMER_UNIT_CFG_R_UNIT_1MS_F                  (AN_LTH60_BASE + 0x924),  (0x001fffff)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R                            (AN_LTH60_BASE + 0x928)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_SELECTOR_FIELD_F           (AN_LTH60_BASE + 0x928),  (0x0000001f)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_ECHOED_NONCE_F             (AN_LTH60_BASE + 0x928),  (0x000003e0)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_PAUSE_ABILITY_F            (AN_LTH60_BASE + 0x928),  (0x00001c00)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_REMOTE_FAULT_F             (AN_LTH60_BASE + 0x928),  (0x00002000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_ACKNOWLEDGE_F              (AN_LTH60_BASE + 0x928),  (0x00004000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_NEXT_PAGE_F                (AN_LTH60_BASE + 0x928),  (0x00008000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_TRANSMITTED_NONCE_F        (AN_LTH60_BASE + 0x928),  (0x001f0000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_FEC_ABILITY_F              (AN_LTH60_BASE + 0x928),  (0x00200000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_FEC_REQUEST_F              (AN_LTH60_BASE + 0x928),  (0x00400000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_G25_RSFEC_REQUEST_F        (AN_LTH60_BASE + 0x928),  (0x00800000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_G25_FEC_REQUEST_F          (AN_LTH60_BASE + 0x928),  (0x01000000)
#define AN_LTH60_AN_LANE0_BP_ABILITY0_CFG_R_G100_RSFEC_INT_REQUEST_F   (AN_LTH60_BASE + 0x928),  (0x02000000)
#define AN_LTH60_AN_LANE0_BP_ABILITY1_CFG_R                            (AN_LTH60_BASE + 0x92c)
#define AN_LTH60_AN_LANE0_BP_ABILITY1_CFG_R_TECHNOLOGY_ABILITY_F       (AN_LTH60_BASE + 0x92c),  (0x003fffff)
#define AN_LTH60_AN_LANE0_XNP_ABILITY0_CFG_R                           (AN_LTH60_BASE + 0x930)
#define AN_LTH60_AN_LANE0_XNP_ABILITY0_CFG_R_NP0_MESSAGE_CODE_F        (AN_LTH60_BASE + 0x930),  (0x000007ff)
#define AN_LTH60_AN_LANE0_XNP_ABILITY0_CFG_R_NP0_TOGGLE_F              (AN_LTH60_BASE + 0x930),  (0x00000800)
#define AN_LTH60_AN_LANE0_XNP_ABILITY0_CFG_R_NP0_ACKNOWLEDGE2_F        (AN_LTH60_BASE + 0x930),  (0x00001000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY0_CFG_R_NP0_MESSAGE_PAGE_F        (AN_LTH60_BASE + 0x930),  (0x00002000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY0_CFG_R_NP0_ACKNOWLEDGE_F         (AN_LTH60_BASE + 0x930),  (0x00004000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY0_CFG_R_NP0_NEXT_PAGE_F           (AN_LTH60_BASE + 0x930),  (0x00008000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY1_CFG_R                           (AN_LTH60_BASE + 0x934)
#define AN_LTH60_AN_LANE0_XNP_ABILITY1_CFG_R_NP0_UNFORMATTED_CODE_F    (AN_LTH60_BASE + 0x934),  (0xffffffff)
#define AN_LTH60_AN_LANE0_XNP_ABILITY2_CFG_R                           (AN_LTH60_BASE + 0x938)
#define AN_LTH60_AN_LANE0_XNP_ABILITY2_CFG_R_NP1_MESSAGE_CODE_F        (AN_LTH60_BASE + 0x938),  (0x000007ff)
#define AN_LTH60_AN_LANE0_XNP_ABILITY2_CFG_R_NP1_TOGGLE_F              (AN_LTH60_BASE + 0x938),  (0x00000800)
#define AN_LTH60_AN_LANE0_XNP_ABILITY2_CFG_R_NP1_ACKNOWLEDGE2_F        (AN_LTH60_BASE + 0x938),  (0x00001000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY2_CFG_R_NP1_MESSAGE_PAGE_F        (AN_LTH60_BASE + 0x938),  (0x00002000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY2_CFG_R_NP1_ACKNOWLEDGE_F         (AN_LTH60_BASE + 0x938),  (0x00004000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY2_CFG_R_NP1_NEXT_PAGE_F           (AN_LTH60_BASE + 0x938),  (0x00008000)
#define AN_LTH60_AN_LANE0_XNP_ABILITY3_CFG_R                           (AN_LTH60_BASE + 0x93c)
#define AN_LTH60_AN_LANE0_XNP_ABILITY3_CFG_R_NP1_UNFORMATTED_CODE_F    (AN_LTH60_BASE + 0x93c),  (0xffffffff)
#define AN_LTH60_AN_LANE0_LINK_STATUS_CFG_R                            (AN_LTH60_BASE + 0x940)
#define AN_LTH60_AN_LANE0_LINK_STATUS_CFG_R_LINK_UP_KX_F               (AN_LTH60_BASE + 0x940),  (0x00000001)
#define AN_LTH60_AN_LANE0_LINK_STATUS_CFG_R_LINK_UP_2P5G_KX_F          (AN_LTH60_BASE + 0x940),  (0x00000002)
#define AN_LTH60_AN_LANE0_LINK_STATUS_CFG_R_LINK_UP_KX4_F              (AN_LTH60_BASE + 0x940),  (0x00000004)
#define AN_LTH60_AN_LANE0_LINK_STATUS_CFG_R_LINK_UP_OTHER_F            (AN_LTH60_BASE + 0x940),  (0x00000008)
#define AN_LTH60_AN_LANE0_RX_SAMPLE_TOLERANCE_CFG_R                    (AN_LTH60_BASE + 0x944)
#define AN_LTH60_AN_LANE0_RX_SAMPLE_TOLERANCE_CFG_R_AN_MAX_DEV_F       (AN_LTH60_BASE + 0x944),  (0x000000ff)
#define AN_LTH60_AN_LANE0_RX_SAMPLE_TOLERANCE_CFG_R_AN_MIN_DEV_F       (AN_LTH60_BASE + 0x944),  (0x0000ff00)
#define AN_LTH60_AN_LANE0_STATUS_R                                     (AN_LTH60_BASE + 0x948)
#define AN_LTH60_AN_LANE0_STATUS_R_LP_AUTONEG_ABLE_F                   (AN_LTH60_BASE + 0x948),  (0x00000001)
#define AN_LTH60_AN_LANE0_STATUS_R_PAGE_RX_F                           (AN_LTH60_BASE + 0x948),  (0x00000002)
#define AN_LTH60_AN_LANE0_STATUS_R_RENEW_PAGE_F                        (AN_LTH60_BASE + 0x948),  (0x00000004)
#define AN_LTH60_AN_LANE0_STATUS_R_AUTONEG_COMPLETE_F                  (AN_LTH60_BASE + 0x948),  (0x00000008)
#define AN_LTH60_AN_LANE0_STATUS_R_PARALLEL_DETECTION_FAULT_F          (AN_LTH60_BASE + 0x948),  (0x00000010)
#define AN_LTH60_AN_LANE0_STATUS_R_INCOMPATIBLE_LINK_F                 (AN_LTH60_BASE + 0x948),  (0x00000020)
#define AN_LTH60_AN_LANE0_STATUS_R_AN_LINK_GOOD_F                      (AN_LTH60_BASE + 0x948),  (0x00000040)
#define AN_LTH60_AN_LANE0_STATUS_R_FEC_NEGOTIATED_F                    (AN_LTH60_BASE + 0x948),  (0x00000080)
#define AN_LTH60_AN_LANE0_STATUS_R_RSFEC_NEGOTIATED_F                  (AN_LTH60_BASE + 0x948),  (0x00000100)
#define AN_LTH60_AN_LANE0_STATUS_R_PAUSE_NEGOTIATED_F                  (AN_LTH60_BASE + 0x948),  (0x00000600)
#define AN_LTH60_AN_LANE0_STATUS_R_AN_ARB_STATE_HIS_F                  (AN_LTH60_BASE + 0x948),  (0x7ffff800)
#define AN_LTH60_AN_LANE0_STATUS_R_RSFEC_INT_NEGOTIATED_F              (AN_LTH60_BASE + 0x948),  (0x80000000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R                       (AN_LTH60_BASE + 0x94c)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G1_KX_F               (AN_LTH60_BASE + 0x94c),  (0x00000003)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G10_KX4_F             (AN_LTH60_BASE + 0x94c),  (0x0000000c)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G10_KR_F              (AN_LTH60_BASE + 0x94c),  (0x00000030)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G40_KR4_F             (AN_LTH60_BASE + 0x94c),  (0x000000c0)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G40_CR4_F             (AN_LTH60_BASE + 0x94c),  (0x00000300)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G100_CR10_F           (AN_LTH60_BASE + 0x94c),  (0x00000c00)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G100_KP4_F            (AN_LTH60_BASE + 0x94c),  (0x00003000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G100_KR4_F            (AN_LTH60_BASE + 0x94c),  (0x0000c000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G100_CR4_F            (AN_LTH60_BASE + 0x94c),  (0x00030000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G25_KRCR_S_F          (AN_LTH60_BASE + 0x94c),  (0x000c0000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G25_KRCR_F            (AN_LTH60_BASE + 0x94c),  (0x00300000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G2P5_KX_F             (AN_LTH60_BASE + 0x94c),  (0x00c00000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G5_KR_F               (AN_LTH60_BASE + 0x94c),  (0x03000000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G50_KR_CR_F           (AN_LTH60_BASE + 0x94c),  (0x0c000000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G100_KR2_CR2_F        (AN_LTH60_BASE + 0x94c),  (0x30000000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL0_STATUS_R_G200_KR4_CR4_F        (AN_LTH60_BASE + 0x94c),  (0xc0000000)
#define AN_LTH60_AN_LANE0_LINK_CONTROL1_STATUS_R                       (AN_LTH60_BASE + 0x950)
#define AN_LTH60_AN_LANE0_LINK_CONTROL1_STATUS_R_G100_CR_KR_F          (AN_LTH60_BASE + 0x950),  (0x00000003)
#define AN_LTH60_AN_LANE0_LINK_CONTROL1_STATUS_R_G200_CR2_KR2_F        (AN_LTH60_BASE + 0x950),  (0x0000000c)
#define AN_LTH60_AN_LANE0_LINK_CONTROL1_STATUS_R_G400_CR4_KR4_F        (AN_LTH60_BASE + 0x950),  (0x00000030)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R                      (AN_LTH60_BASE + 0x954)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_SELECTOR_FIELD_F     (AN_LTH60_BASE + 0x954),  (0x0000001f)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_ECHOED_NONCE_F       (AN_LTH60_BASE + 0x954),  (0x000003e0)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_PAUSE_ABILITY_F      (AN_LTH60_BASE + 0x954),  (0x00001c00)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_REMOTE_FAULT_F       (AN_LTH60_BASE + 0x954),  (0x00002000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_ACKNOWLEDGE_F        (AN_LTH60_BASE + 0x954),  (0x00004000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_NEXT_PAGE_F          (AN_LTH60_BASE + 0x954),  (0x00008000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_TRANSMITTED_NONCE_F  (AN_LTH60_BASE + 0x954),  (0x001f0000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_FEC_ABILITY_F        (AN_LTH60_BASE + 0x954),  (0x00200000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_FEC_REQUEST_F        (AN_LTH60_BASE + 0x954),  (0x00400000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_G25_RSFEC_REQUEST_F  (AN_LTH60_BASE + 0x954),  (0x00800000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_G25_FEC_REQUEST_F    (AN_LTH60_BASE + 0x954),  (0x01000000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY0_STATUS_R_G100_RSFEC_INT_REQUEST_F (AN_LTH60_BASE + 0x954),  (0x02000000)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY1_STATUS_R                      (AN_LTH60_BASE + 0x958)
#define AN_LTH60_AN_LANE0_LP_BP_ABILITY1_STATUS_R_TECHNOLOGY_ABILITY_F (AN_LTH60_BASE + 0x958),  (0x003fffff)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY0_STATUS_R                     (AN_LTH60_BASE + 0x95c)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY0_STATUS_R_NP0_MESSAGE_CODE_F  (AN_LTH60_BASE + 0x95c),  (0x000007ff)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY0_STATUS_R_NP0_TOGGLE_F        (AN_LTH60_BASE + 0x95c),  (0x00000800)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY0_STATUS_R_NP0_ACKNOWLEDGE2_F  (AN_LTH60_BASE + 0x95c),  (0x00001000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY0_STATUS_R_NP0_MESSAGE_PAGE_F  (AN_LTH60_BASE + 0x95c),  (0x00002000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY0_STATUS_R_NP0_ACKNOWLEDGE_F   (AN_LTH60_BASE + 0x95c),  (0x00004000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY0_STATUS_R_NP0_NEXT_PAGE_F     (AN_LTH60_BASE + 0x95c),  (0x00008000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY1_STATUS_R                     (AN_LTH60_BASE + 0x960)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY1_STATUS_R_NP0_UNFORMATTED_CODE_F (AN_LTH60_BASE + 0x960),  (0xffffffff)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY2_STATUS_R                     (AN_LTH60_BASE + 0x964)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY2_STATUS_R_NP1_MESSAGE_CODE_F  (AN_LTH60_BASE + 0x964),  (0x000007ff)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY2_STATUS_R_NP1_TOGGLE_F        (AN_LTH60_BASE + 0x964),  (0x00000800)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY2_STATUS_R_NP1_ACKNOWLEDGE2_F  (AN_LTH60_BASE + 0x964),  (0x00001000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY2_STATUS_R_NP1_MESSAGE_PAGE_F  (AN_LTH60_BASE + 0x964),  (0x00002000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY2_STATUS_R_NP1_ACKNOWLEDGE_F   (AN_LTH60_BASE + 0x964),  (0x00004000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY2_STATUS_R_NP1_NEXT_PAGE_F     (AN_LTH60_BASE + 0x964),  (0x00008000)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY3_STATUS_R                     (AN_LTH60_BASE + 0x968)
#define AN_LTH60_AN_LANE0_LP_XNP_ABILITY3_STATUS_R_NP1_UNFORMATTED_CODE_F (AN_LTH60_BASE + 0x968),  (0xffffffff)
#define AN_LTH60_AN_LANE0_RX_DME_STAT_CNT_R                            (AN_LTH60_BASE + 0x96c)
#define AN_LTH60_AN_LANE0_RX_DME_STAT_CNT_R_TWO_TRANS_ERR_F            (AN_LTH60_BASE + 0x96c),  (0x0000000f)
#define AN_LTH60_AN_LANE0_RX_DME_STAT_CNT_R_MORE_TRANS_ERR_F           (AN_LTH60_BASE + 0x96c),  (0x000000f0)
#define AN_LTH60_AN_LANE0_RX_DME_STAT_CNT_R_AN_RX_STATE_F              (AN_LTH60_BASE + 0x96c),  (0x000fff00)
#define AN_LTH60_AN_LANE0_DBG_INFO_R                                   (AN_LTH60_BASE + 0x970)
#define AN_LTH60_AN_LANE0_DBG_INFO_R_AN_RX_IDLE_CNT_F                  (AN_LTH60_BASE + 0x970),  (0x0000000f)
#define AN_LTH60_AN_LANE0_DBG_INFO_R_AN_CONSISTENCY_NMATCH_CNT_F       (AN_LTH60_BASE + 0x970),  (0x000000f0)
#define AN_LTH60_AN_LANE0_DBG_INFO_R_AN_NPAGE_CNT_PREVIOUS_F           (AN_LTH60_BASE + 0x970),  (0x00000f00)
#define AN_LTH60_AN_LANE0_DBG_INFO_R_AN_NPAGE_CNT_FINAL_F              (AN_LTH60_BASE + 0x970),  (0x0000f000)
#define AN_LTH60_AN_LANE0_DBG_INFO_R_AN_LOSE_CNT_F                     (AN_LTH60_BASE + 0x970),  (0x000f0000)
#define AN_LTH60_AN_LANE0_DBG_TIMER_R                                  (AN_LTH60_BASE + 0x974)
#define AN_LTH60_AN_LANE0_DBG_TIMER_R_AN_GOOD_CHECK_CNT_F              (AN_LTH60_BASE + 0x974),  (0x0000ffff)
#define AN_LTH60_AN_LANE0_SPARE_R                                      (AN_LTH60_BASE + 0x978)
#define AN_LTH60_AN_LANE0_SPARE_R_SPARE_F                              (AN_LTH60_BASE + 0x978),  (0xffffffff)
#define AN_LTH60_AN_LANE0_SPARE_CNT_R                                  (AN_LTH60_BASE + 0x97c)
#define AN_LTH60_AN_LANE0_SPARE_CNT_R_CNT_F                            (AN_LTH60_BASE + 0x97c),  (0x0000ffff)

#endif
